3 ms·
So would these being using the same TSMC process and instead be a layout change rather than a die shrink?
by mlindner 5y ago
So would these being using the same TSMC process and instead be a layout change rather than a die shrink?
- B1FF_PSUVM 5y agoThey may adopting the (lost ?) Intel tick-tock approach: - one year you shrink the geometry and reap speed-power-area gains - the other year you refine the logic circuitry and improve efficiency