4 ms·
I recently went back over this chip because I really want to love it. They overhauled the software so now there's no colorforth. I'm not sure that the newer sof
by gaze 5y ago
I recently went back over this chip because I really want to love it. They overhauled the software so now there's no colorforth. I'm not sure that the newer software is easier to use, though! That said, the hard pill to swallow is the philosophy. Once you buy into the philosophy, the software is right in line with it. It's not a bad philosophy -- that is, that most software does more than it needs and one should just start from first principles and write the software that solves the problem and nothing else. It's just a hard one to adopt.
My objective was to make a low-cost lock-in amplifier for low temperature physics experiments. Usually you'd just buy a mid-range FPGA to do the signal processing but I was feeling spicy. We usually process signals up to 12 MHz or so, and to obey fs=fmax*4, you need to ingest 48 MSPS. I found that to multiply two words, you'd need 30 nanoseconds -- the multiply instruction implements one step of a multiply, so you need to run it in a loop. Anyway, that limits me to 1/(30 ns) = 33 MSPS of data ingestion, and almost surely it's less due to overhead. For an ICE40UP5K, a device that's $5.90 in qty 1, features DSP cells that can be clocked up to 50 MHz.
I think this may just not be the kind of problem that these processors work well on. It may be that they're optimized for instructions per joule or something. Either way, cool CPU/architecture, I love self-clocked stuff, but I just couldn't find a way to justify it for the kinds of problems I deal with.
The company itself I think is having trouble with funding. It's a bit of a chicken and egg problem -- if they could make the chip on a more modern process node, they might be able to develop something much faster, and thus more competitive with MPUs/MCUs/FPGAs. But, they admirably keep chugging along in their FORTH compound in Wyoming. I eagerly look forward to what they come up with next.
- avodonosov 5y agoVery low energy consuption is one of the advertized features and as I understood the primary reason for no clock. When the chip is waiting for input and executes no instructions, no energy is spent, except for transistor leakage, acoording to Chuck Moore. In his talk about this chip, he said said the future of computing is very small, very energy devices. "Computing dust", I think he said.
- gaze 5y agoYeah. I think that's right. The power figures really are impressive. Perhaps the right point of comparison is the MSP430, as is done in this article http://www.greenarraychips.com/home/documents/greg/WP003-100617-msp430.pdf http://www.greenarraychips.com/home/documents/greg/WP003-100...
- avodonosov 5y agoHave you considered implementing parallel processing instead of the loop for your processing?
- gaze 5y agoI've considered it. But why bother. Why work so hard to apply the wrong tool for the job
- daniel-cussen 5y ago> I found that to multiply two words, you'd need 30 nanoseconds -- the multiply instruction implements one step of a multiply, so you need to run it in a loop. Anyway, that limits me to 1/(30 ns) = 33 MSPS of data ingestion, and almost surely it's less due to overhead. What? While it actually takes about 100 nanoseconds, not 30 nanoseconds, for an 18-by-18-bit multiply, you can do hundreds in parallel, so it should be fine for your purposes. Am I missing something with how your numbers square up?
- gaze 5y agoIt’s 18 bits and 1.5 nanoseconds per +* plus overhead using a micronext. What did I miss? Also you’re assuming what I want to do is trivially parallelizable.
- daniel-cussen 5y agoRoughly 1.5 nanoseconds, right, plus 2.4 for the micronext. So that's 3.8 ns * 18 is 68.4 ns, plus the time to set up the multiplication, which is about 30 ns.
- gaze 5y agoOh maybe it was that I had just unrolled it. I suppose there’s some setup involved though that I hadn’t accounted for. Either way, it’s a bit slow when it comes to DSP stuff unless you can avoid multiplications.
- UncleOxidant 5y agoI've never heard of this chip or GreenArrays. It seems a bit like what Parallella was trying to go for - but again it was a situation where they just didn't get the funding. I've got a couple of the 16-core parallella boards from the same era as this article. They were hoping to have a 1024-core chip after that, but they folded. Funding is a very difficult problem for small companies in this alternative CPU space.