Thank you! And not parallel, alas. The image compiles to a graph, where contiguous regions are nodes and adjacent regions form edges. Regarding differentiation

Thank you! And not parallel, alas. The image compiles to a graph, where contiguous regions are nodes and adjacent regions form edges. Regarding differentiation, the logic gates could look like a differential equation. Between iterations, input nodes amass a binary vector from adjacent wires, and pass them onto adjacent output nodes. So, mapping {0,1}^n --> {0, 1}, you could write them all in terms of some periodic function. (E.g. xor implemented with sin, or implemented with a sigmoid made from a quarter of a sin, etc.) Either way, yeah! There is plenty of room to speed this up