I'm not a semiconductor engineer, but one of the problems with this approach is that modern chips are significantly more "3D"; they have tons of layers in them,

I'm not a semiconductor engineer, but one of the problems with this approach is that modern chips are significantly more "3D"; they have tons of layers in them, and you also got stuff like finfets etc to deal with. You can see some of that in here https://www.extremetech.com/computing/193200-intels-14nm-broadwell-chip-reverse-engineered-reveals-impressive-finfets-13-layer-design https://www.extremetech.com/computing/193200-intels-14nm-bro...