3 ms·
As a complete layman I wonder if there’s a future where you could use a picture/X-ray of an old CPU architecture and simulate it blindly with an approach simila
by mentos 5y ago
As a complete layman I wonder if there’s a future where you could use a picture/X-ray of an old CPU architecture and simulate it blindly with an approach similar to yours?
- lynndotpy 5y agoI think it'd have to be a very different approach (unless it's an electron scan?) I'm not an electrical engineer though, so I'm in the layman camp as well! If someone made that, I assume it'd use some computer vision to identify the individual components and the connections between them. After that, each component would need to have their individual simulator. (Unless x-rays can see individual semiconductors?)
- philipkglass 5y ago"Blindly" is a stretch but people have built transistor level simulations of old chips from photographs. Check out the delightful Visual 6502 if you've never seen it before: In the summer of 2009, working from a single 6502, we exposed the silicon die, photographed its surface at high resolution and also photographed its substrate. Using these two highly detailed aligned photographs, we created vector polygon models of each of the chip's physical components - about 20,000 of them in total for the 6502. These components form circuits in a few simple ways according to how they contact each other, so by intersecting our polygons, we were able to create a complete digital model and transistor-level simulation of the chip. This model is very accurate and can run classic 6502 programs, including Atari games. By rendering our polygons with colors corresponding to their 'high' or 'low' logic state, we can show, visually, exactly how the chip operates: how it reads data and instructions from memory, how its registers and internal busses operate, and how toggling a single input pin (the 'clock') on and off drives the entire chip to step through a program and get things done. http://www.visual6502.org/ http://www.visual6502.org/
- zokier 5y agoI'm not a semiconductor engineer, but one of the problems with this approach is that modern chips are significantly more "3D"; they have tons of layers in them, and you also got stuff like finfets etc to deal with. You can see some of that in here https://www.extremetech.com/computing/193200-intels-14nm-broadwell-chip-reverse-engineered-reveals-impressive-finfets-13-layer-design https://www.extremetech.com/computing/193200-intels-14nm-bro...