3 ms·

They are all different dies. However, the M1 Pro is just an M1 Max design with a chunk lopped off the bottom. Not at the manufacturing stage; at the design stag

They are all different dies. However, the M1 Pro is just an M1 Max design with a chunk lopped off the bottom. Not at the manufacturing stage; at the design stage. They are otherwise identical; the device tree representation of the M1 Max is a superset of the M1 Pro, down to memory addresses and everything. Binning comes in with the lower-core-count variants of each chip.

mmmBacon 5y ago
Again yield; not sure how many people understand how big yield would be even Apple. At some yield you can’t support the demand. None of what was written above makes a lot of sense unless Apples just burning fab cycles. They might be but I kind of doubt it since it would seriously impact device cost and would take up slots in the fab leading to longer lead times. Not even Apple can dictate all their chips to be P1 at TSMC. In actuality it’s much more likely that the difference is in metal connectivity for cores. For low core designs it’s likely the lower number of cores are yield fallout and they use an e-fuse to disable them. The metal difference would be faster and allow them to respond faster to changes in demand even while wafers are in the line. The cost of all these masks and skus would be a factor even for Apple because we aren’t talking about some old technology node here. They are on the bleeding edge and I’m sure they have capacity constraints just like everyone else.
- marcan_42 5y ago
  I'm not guessing. They are different dies. There is no need to write a hypothetical wall of text and get it wrong; you can just look up die shots or chip package shots or device trees and know they're different dies. This information is well known. There's a massive difference in size and aspect ratio between all 3 dies. It would not be cost efficient to fab M1 Max dies and sell them as M1 Pro. The M1 Max is explicitly designed as a logical and layout superset of the M1 Pro, but not for binning purposes, just because that way they don't need to do two completely different layouts. SoC codes T8103 (M1), T6000 (M1 Pro), T6001 (M1 Max). Yes, they do use binning and e-fuses for the lower core count versions within each die/SoC type.
  - WatchDog 5y ago
    I tried finding die shots of the M1. Techinsights have a die shot of the original M1[0]. But for the pro and max, I could only find the die shots from the apple press release. The pro just looks like a cropped max, I wasn't sure if it was just cropped for illustration purposes or actually a different die. Are there any publicly available die shots of pro/max from a third party source? [0]: https://www.techinsights.com/blog/two-new-apple-socs-two-market-events-apple-a14-and-m1 https://www.techinsights.com/blog/two-new-apple-socs-two-mar...
    - marcan_42 5y ago
      The Pro isn't a flat out cropped Max; you can tell because the bottom edge looks like a proper die edge, and there are subtle places where the break line wouldn't be straight (compare the DDR channels with the rest of the blocks, they don't line up slightly). The Max is a cropped real Max because they tried to hide the die-to-die interconnect (meant for a 2-die Max machine) at the bottom. You can tell because the die abruptly stops at that edge hard, without the expected features of an IC edge. Clearly if they'd gone as far as photoshopping that on for the Pro, they wouldn't have screwed it up on the Max ;-) I'm not aware of any other public die shots of the Pro, but there is one of the Max that went around on Twitter and it matches the marketing shot, plus an extra strip on the bottom edge as we'd suspected. We do know the M1 Pro has a completely different and smaller package, however, and the M1 Max die would not fit on it. That one was leaked months before the announcement as part of the board layout and schematics for that machine. So the Max die simply wouldn't fit on Pro machines, and this is from engineering drawings.
  - mmmBacon 5y ago
    If the metal isn’t there it won’t show up in device tree because it physically isn’t connected on the die. So device tree as you keep pointing out cannot tell you if it’s same die or not. Also the device can be there and not be in device tree meaning the devices memory location was omitted from device tree when the device tree blob was built. It may well be that they have different die. But that’s usually an expensive way to do things. Usually you want downgrade paths for devices that don’t yield. Source: 23 years in semiconductor industry.

mmmBacon 5y ago

Again yield; not sure how many people understand how big yield would be even Apple. At some yield you can’t support the demand. None of what was written above makes a lot of sense unless Apples just burning fab cycles. They might be but I kind of doubt it since it would seriously impact device cost and would take up slots in the fab leading to longer lead times. Not even Apple can dictate all their chips to be P1 at TSMC. In actuality it’s much more likely that the difference is in metal connectivity for cores. For low core designs it’s likely the lower number of cores are yield fallout and they use an e-fuse to disable them. The metal difference would be faster and allow them to respond faster to changes in demand even while wafers are in the line. The cost of all these masks and skus would be a factor even for Apple because we aren’t talking about some old technology node here. They are on the bleeding edge and I’m sure they have capacity constraints just like everyone else.

marcan_42 5y ago
I'm not guessing. They are different dies. There is no need to write a hypothetical wall of text and get it wrong; you can just look up die shots or chip package shots or device trees and know they're different dies. This information is well known. There's a massive difference in size and aspect ratio between all 3 dies. It would not be cost efficient to fab M1 Max dies and sell them as M1 Pro. The M1 Max is explicitly designed as a logical and layout superset of the M1 Pro, but not for binning purposes, just because that way they don't need to do two completely different layouts. SoC codes T8103 (M1), T6000 (M1 Pro), T6001 (M1 Max). Yes, they do use binning and e-fuses for the lower core count versions within each die/SoC type.
- WatchDog 5y ago
  I tried finding die shots of the M1. Techinsights have a die shot of the original M1[0]. But for the pro and max, I could only find the die shots from the apple press release. The pro just looks like a cropped max, I wasn't sure if it was just cropped for illustration purposes or actually a different die. Are there any publicly available die shots of pro/max from a third party source? [0]: https://www.techinsights.com/blog/two-new-apple-socs-two-market-events-apple-a14-and-m1 https://www.techinsights.com/blog/two-new-apple-socs-two-mar...
  - marcan_42 5y ago
    The Pro isn't a flat out cropped Max; you can tell because the bottom edge looks like a proper die edge, and there are subtle places where the break line wouldn't be straight (compare the DDR channels with the rest of the blocks, they don't line up slightly). The Max is a cropped real Max because they tried to hide the die-to-die interconnect (meant for a 2-die Max machine) at the bottom. You can tell because the die abruptly stops at that edge hard, without the expected features of an IC edge. Clearly if they'd gone as far as photoshopping that on for the Pro, they wouldn't have screwed it up on the Max ;-) I'm not aware of any other public die shots of the Pro, but there is one of the Max that went around on Twitter and it matches the marketing shot, plus an extra strip on the bottom edge as we'd suspected. We do know the M1 Pro has a completely different and smaller package, however, and the M1 Max die would not fit on it. That one was leaked months before the announcement as part of the board layout and schematics for that machine. So the Max die simply wouldn't fit on Pro machines, and this is from engineering drawings.
- mmmBacon 5y ago
  If the metal isn’t there it won’t show up in device tree because it physically isn’t connected on the die. So device tree as you keep pointing out cannot tell you if it’s same die or not. Also the device can be there and not be in device tree meaning the devices memory location was omitted from device tree when the device tree blob was built. It may well be that they have different die. But that’s usually an expensive way to do things. Usually you want downgrade paths for devices that don’t yield. Source: 23 years in semiconductor industry.