3 ms·
IIRC, the IBM/360 exception model is such that if an exception occurs, there instruction in question cannot have any side effects -- no partial execution. That
by tasty_freeze 5y ago
IIRC, the IBM/360 exception model is such that if an exception occurs, there instruction in question cannot have any side effects -- no partial execution. That leads to a clean exception model but can cause performance pain.
Say the instruction is a string copy. The instruction itself might cross a page boundary, and the source might cross a page boundary (perhaps more than one), and the destination can also cross a page boundary. The microcode can't just begin processing the instruction, then hit a page fault, fix up the page mapping, and continue. Instead it must check that each possible read or write will not cause a page fault and only then proceed with the entire sequence.
- monocasa 5y agoInterestingly this is somewhere that x86 is cleaner. For instance on x86, the 'memcpy' instruction rep movsb is architecturally defined as simply not incrementing the program counter until it meets it's end condition. It can perform one move decrement remain count, increment addresses, check for exceptions and interrupts then repeat. Cortex M also exposes how far you are into a ldm/stm for recoverable exceptions as well.