The author also fails to mention one other important failure point, which is write-back caching effects. This obviously doesn’t pop up for microcontrollers sinc

The author also fails to mention one other important failure point, which is write-back caching effects. This obviously doesn’t pop up for microcontrollers since they don’t have a CPU cache, but if you’re interacting with PCIE BAR registers from x86/ARM and you don’t use non-temporal load/store instructions to bypass CPU caching side effects, you’re going to have a bad time.