3 ms·

6809 also has great reentrancy support with stack and pointer relative indexing modes featuring auto increment / decrement. More interestingly, I never underst

6809 also has great reentrancy support with stack and pointer relative indexing modes featuring auto increment / decrement. More interestingly, I never understood why code was at $0100 in CP/M land. I just got a Z80 card for my Apple 6502 based retro computer. I have never used CP/M and the availability of fairly sophisticated software interests me.

kragen 5y ago
The first 64 bytes of the 8080 address space contain the interrupt vectors, which I think normally pointed into the CP/M BIOS, so you wouldn't want to overwrite them with the contents of your COM file executable. But the BIOS is loaded from disk (unlike on the IBM PC), so that needs to be RAM. CP/M needs a little bit of memory space for its own variables, and it makes sense to put it next to the interrupt vectors, since we know there's RAM mapped there, because there were no RAM chips as small as 64 bits. And we know there's more RAM than CP/M needs for enough of its own variables to permit a warm boot, because there were no RAM chips as small as 256 bits either. So it makes sense to load the user program immediately after CP/M's variables, because any extra slack space there is wasted. That sort of constrains the load address to be something in the range 0x41-0x200 or so. I'm not sure why they ended up at 0x100 instead of, say, 0x80 or 0xC0. This setup was a big problem for the TRS-80, which mapped ROM at the bottom of memory.
- kragen 5y ago
  Correction: according to https://en.wikipedia.org/wiki/Intel#Early_history https://en.wikipedia.org/wiki/Intel#Early_history Intel's first product, in 01969, was the 3101 64-bit TTL SRAM chip. So there were RAM chips as small as 64 bits. But they weren't what was normally in CP/M machines; the base MITS Altair came with 256 bytes of RAM, but needed at least 4096 bytes to run BASIC.

3 ms·

6809 also has great reentrancy support with stack and pointer relative indexing modes featuring auto increment / decrement. More interestingly, I never underst

by ddingus 5y ago

kragen 5y ago
The first 64 bytes of the 8080 address space contain the interrupt vectors, which I think normally pointed into the CP/M BIOS, so you wouldn't want to overwrite them with the contents of your COM file executable. But the BIOS is loaded from disk (unlike on the IBM PC), so that needs to be RAM. CP/M needs a little bit of memory space for its own variables, and it makes sense to put it next to the interrupt vectors, since we know there's RAM mapped there, because there were no RAM chips as small as 64 bits. And we know there's more RAM than CP/M needs for enough of its own variables to permit a warm boot, because there were no RAM chips as small as 256 bits either. So it makes sense to load the user program immediately after CP/M's variables, because any extra slack space there is wasted. That sort of constrains the load address to be something in the range 0x41-0x200 or so. I'm not sure why they ended up at 0x100 instead of, say, 0x80 or 0xC0. This setup was a big problem for the TRS-80, which mapped ROM at the bottom of memory.
- kragen 5y ago
  Correction: according to https://en.wikipedia.org/wiki/Intel#Early_history https://en.wikipedia.org/wiki/Intel#Early_history Intel's first product, in 01969, was the 3101 64-bit TTL SRAM chip. So there were RAM chips as small as 64 bits. But they weren't what was normally in CP/M machines; the base MITS Altair came with 256 bytes of RAM, but needed at least 4096 bytes to run BASIC.