they started this thought: "Aside from DRAM expansion and smarter NICs, CXL also hopes to revolutionize how we view and share the memory pools already installe

they started this thought: "Aside from DRAM expansion and smarter NICs, CXL also hopes to revolutionize how we view and share the memory pools already installed in your chips. Today, every device has its own address space. Transparently unified addressing is extremely slow for randomized memory patterns and causes unpredictable latencies. " and never really finished it. does CXL include address mapping?