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> ...the government had no problem forcing them to both add IME/PSP. This is a false narrative, these management engines were added because large (corporate) c

> ...the government had no problem forcing them to both add IME/PSP. This is a false narrative, these management engines were added because large (corporate) customers of the major CPU vendors asked for them. Enterprise IT shops love stuff like this, anything to help them tame the unruly beast of asset inventory and management. This is the same reason things like iLO and DRAC exist, and they have all of the same types of bugs for the same core reason. Not only does the government not want management engines, the ability to turn them off using HAP is courtesy of the US government (namely the NSA!) asking for a feature to disable it. The main problem here is that the truth is boring, and the conspiracy theory sounds much more interesting. https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html https://www.csoonline.com/article/3220476/researchers-say-no...

smoldesu 5y ago
Why are management engines not delegated to professional/enterprise machines only then? Seems like an awful lot of money to waste putting specialized hardware into every machine you ship if only a fraction of the users will actually ever take advantage of it.
- supernovae 5y ago
  economy of scale. Cheaper by volume and priced on utilization. There was a time when HP sold servers that could be up to say, 8 cores but only two were on by default and you cloud license the rest. It was cheaper to shop the hardware and software gate it rather than limit it and have a process in the middle.
  - ndiddy 5y ago
    Why does Intel, a company known for its extensive price discrimination (see ECC memory support, hardware virtualization, FPU support in the 90s) still put ME in all of its consumer CPUs when it’s only useful for the enterprise market?
    - gjsman-1000 5y ago
      Economy of scale. The ME isn't just a management tool but is also used to help initialize the CPU. No reason to write a whole custom way of doing that instead of reusing the same technology. Also, customer CPUs are often (due to binning) rebranded Enterprise CPUs that were rejected (or just not purchased) for whatever reason, or vice versa. Easier to build ME on them all and configure it later. Your ECC memory? It's something Intel just flips on or off depending on how they want to sell the chip - many Core i7s and i9s have it on-die but you can't use it. That's because it might be useful on a Xeon Platinum equivalent.
- deleted 5y ago
  [deleted]
- p_l 5y ago
  Because around the same time as intel started to experiment more with the AMT stuff, the complexity level of actually starting up the CPU and keeping it running had grown to the point where having an extra controller to help it run was found useful. Another reason is that ME (and PSP) are used to assert "security" of "Protected Media Path", which is part of streaming services DRM. It's not the only way to do it, sure, but there's a reason why IBM POWER designs have approximately 2.1x amount of cores that is stated in the spec - pretty much every core has a smaller, simpler one dedicated to keeping the big one running without melting and helping transition to low-power states and back, and there are at least two more cores whose only job is handling some of the early loading of code from flash. Part of why they have those cores is that since POWER8 there was a shift towards more standalone operation without external controller chip (and POWER9 even describes such boot process in manual). For comparison, traditionally the FSP (aka BMC) on IBM POWER systems initialized all of hardware before the CPU would execute first instruction, puppeting the CPU buses through debug interface.

smoldesu 5y ago

Why are management engines not delegated to professional/enterprise machines only then? Seems like an awful lot of money to waste putting specialized hardware into every machine you ship if only a fraction of the users will actually ever take advantage of it.

supernovae 5y ago
economy of scale. Cheaper by volume and priced on utilization. There was a time when HP sold servers that could be up to say, 8 cores but only two were on by default and you cloud license the rest. It was cheaper to shop the hardware and software gate it rather than limit it and have a process in the middle.
- ndiddy 5y ago
  Why does Intel, a company known for its extensive price discrimination (see ECC memory support, hardware virtualization, FPU support in the 90s) still put ME in all of its consumer CPUs when it’s only useful for the enterprise market?
  - gjsman-1000 5y ago
    Economy of scale. The ME isn't just a management tool but is also used to help initialize the CPU. No reason to write a whole custom way of doing that instead of reusing the same technology. Also, customer CPUs are often (due to binning) rebranded Enterprise CPUs that were rejected (or just not purchased) for whatever reason, or vice versa. Easier to build ME on them all and configure it later. Your ECC memory? It's something Intel just flips on or off depending on how they want to sell the chip - many Core i7s and i9s have it on-die but you can't use it. That's because it might be useful on a Xeon Platinum equivalent.
deleted 5y ago
[deleted]
p_l 5y ago
Because around the same time as intel started to experiment more with the AMT stuff, the complexity level of actually starting up the CPU and keeping it running had grown to the point where having an extra controller to help it run was found useful. Another reason is that ME (and PSP) are used to assert "security" of "Protected Media Path", which is part of streaming services DRM. It's not the only way to do it, sure, but there's a reason why IBM POWER designs have approximately 2.1x amount of cores that is stated in the spec - pretty much every core has a smaller, simpler one dedicated to keeping the big one running without melting and helping transition to low-power states and back, and there are at least two more cores whose only job is handling some of the early loading of code from flash. Part of why they have those cores is that since POWER8 there was a shift towards more standalone operation without external controller chip (and POWER9 even describes such boot process in manual). For comparison, traditionally the FSP (aka BMC) on IBM POWER systems initialized all of hardware before the CPU would execute first instruction, puppeting the CPU buses through debug interface.