3 ms·
I wonder how flexible the serdes built in test equipment stuff is. A BNC-to-PCIe-lane board with some signal conditioning would make for a hilarious oscillosco
by RF_Savage 5y ago
I wonder how flexible the serdes built in test equipment stuff is.
A BNC-to-PCIe-lane board with some signal conditioning would make for a hilarious oscilloscope.
- jacquesm 5y agoYou better make isolation a subpart of 'some signal conditioning' or you'll be looking at some expensive repairs. That's the hard part of making a scope: isolating the source and the scope guts while maintaining signal integrity.
- willis936 5y ago>BNC This makes me smile. When I left PHY testing a few years ago SMA was no longer keeping up with the > 25 GBaud PAM4 standards coming out. BNC was useful for PHY development in the 90s.
- jjoonathan 5y agoI suspect it's heavily sampled, and maybe not only on the time axis. They would already have a reconstructed clock available, so it would be straightforward to sync up a time aperture, and the voltage aperture could be swept by adding an offset into the output comparator(s). They could then scan the ranges of both parameters to build up the eye diagram with minimal additional hardware. This would make it a brilliant oscilloscope if you want an eye diagram of a high speed serial bus, but for just about any other task it would be a bit rubbish. There isn't a UXR hiding in every PCIe 5+ lane.
- RF_Savage 5y agoThat's likely how it is. It would still be interesting if there was something like a glscopeclient driver for them. If nothing else it would make hardcore overclockers step up their game and start talking more about signal integrity. :)
- jjoonathan 5y agoHaha, yes, I'd love to see what slathering vaseline on a high speed diff pair does to the eye. Link equalization is the real MVP! It'll be fun to see how this evolves with 32Gbps and PAM4.