4 ms·
Okay, that is just stupidly wide bandwidth :-). As a systems guy I really don't see the terabytes of bandwidth in main memory coming in the next 5 years. GDDR6,
by ChuckMcM 5y ago
Okay, that is just stupidly wide bandwidth :-). As a systems guy I really don't see the terabytes of bandwidth in main memory coming in the next 5 years. GDDR6, the new "leading edge" is nominally 768GBs, which sounds great but how many transactions per second can you push through a CPU/GPU memory controller? Are we going to see 1152 bit wide memory busses? (1024 bits w/ECC) That is over 1/3 of all the pins on a high end Xeon and you're going to need probably another 512 pins worth of ground return. HBM soldered to the top of the die? Perhaps, that is where GPUs seem to be headed, but my oh my.
I'm sure on the plus side there will be a huge resale market for "combination computer and room heater" :-)
- Terry_Roll 5y agoDatabase running in ram will benefit enormously, just running an ISAM db on a ram drive massively increases performance. RDBMS run alot of stuff in ram as well so all in all I think we will see some decent DB performance gains.
- jlgaddis 5y agoMaybe I'm missing something but how does a newer version of the PCI-e spec directly lead to enormous benefits for a database that's running entirely in RAM? In fact, on the surface, I would think that "traditional" databases (i.e., those residing on actual storage devices) would be more likely to benefit enormously as a result of this "upgrade" -- because of the massive increase in available bandwidth for storage and networking, of course. -- (I'll certainly admit thatI don't follow or keep up with developments in new generations / iterations of Intel processors / hardware architectures, but I'm assuming that Intel's Xeon CPUs still access RAM via their own memory controller. Intel has definitely done (more than) their fair share of stupid shit over the years but I'm guessing they haven't recently decided that, now, the proper place for system memory is on the PCI-e bus!)
- timpattinson 5y agoYeah nothing has changed after the late 2000s when the memory controller moved to the CPU die rather than the northbridge
- Tuna-Fish 5y agoIt's quite possible that in the near future, memory expansion will happen mostly over the PCI-e bus. Vendors are moving towards bringing the main ram closer, to increase bandwidth, reduce power and reduce latency. However, this will necessarily mean that the amount of ram a CPU has will be fixed -- there will be no more dimm slots. So what if you need more ram than the market provides on the top-end cpu? Samsung has your back, with CXL.memory. [0] [0] https://www.anandtech.com/show/16670/using-a-pcie-slot-to-install-dram-new-samsung-cxlmem-expansion-module https://www.anandtech.com/show/16670/using-a-pcie-slot-to-in...
- eptcyka 5y agoThis might first see usecases in the semi-high end enterprise where there are PCI peripherals and SoCs that can spend that amount of pins for the speedup provided but can't afford the more exotic transports.
- kbenson 5y agoStorage cards for many fast nvme/ssd drives in hot swap bays? I haven't don't much with this, but from the outside view it looked like the PCIe slot woukd be the real limiting factor if your got a bunch of nvme based drives that could each pretty much saturate the connection.
- mastax 5y agoDatacenters: memory over fabric (CXL) High End Accelerators: HBM Consumer: maybe on-package DDR like M1 Everywhere: more cache
- timpattinson 5y agoOn-die HBM is already happening in the CPU space: https://www.anandtech.com/show/17067/intel-sapphire-rapids-with-64-gb-of-hbm2e-ponte-vecchio-with-408-mb-l2-cache https://www.anandtech.com/show/17067/intel-sapphire-rapids-w...
- ChuckMcM 5y agoWow, okay then. I wonder if that sort of setup will be like the quad itanium motherboard setups that needed massive sustained airflow to keep running...
- deleted 5y ago[deleted]
- hulitu 5y agoJust like any respectable CPU they will implement thermal throthling.
- addaon 5y ago(On-package, rather than on-die.)
- rajnathani 5y agoAlso Fugaku (The world's #1 supercomputer from 2020 till present) uses HBM2 for its CPU <-> Memory. https://en.wikipedia.org/wiki/Fugaku_(supercomputer) https://en.wikipedia.org/wiki/Fugaku_(supercomputer)
- zbendefy 5y agoWe can start using less pcie lanes for gpus and ssds at the minimum