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Actually, iirc the Apple M1 has that x86 memory model thing on P cores only. And macOS must then only schedule x86 processes on those.
by grishka 5y ago
Actually, iirc the Apple M1 has that x86 memory model thing on P cores only. And macOS must then only schedule x86 processes on those.
- monocasa 5y agoIt turned out that was inaccurate IIRC, and both have the TSO MSR bit.
- my123 5y agoIt wasn't inaccurate. It was true only for the Developer Transition Kit (with Apple A12X). It doesn't apply to release hardware.
- monocasa 5y agoTo be fair, an M1 isn't a A12X. But of course you're totally right, and it's great to finally know the etymology of this particular misunderstanding.