3 ms·
It's easier to generate the clock signal, because other wise the little pio state machines in the rp2040 would have to synchronize with the external clock, and
by monocasa 5y ago
It's easier to generate the clock signal, because other wise the little pio state machines in the rp2040 would have to synchronize with the external clock, and that would cut into max clock speed (and probably put something like this outside the realm of possibility). This is because the rp2040's pio doesn't have a way to latch from an external clock.
- mborges 5y agoThe main reason I did it that way was to have the RMII TX start sequence generated by the PIO program, and to have a loop to output the data I'd need double the frequency of the RMII, so I had to clock it at 100MHz. So either injecting the 50MHz clock from the LAN8720 into the XIN of the RP2040 and removing the crystal there, or moving around 2 resistors on the PHY module.