RISC-V appears to be implementing vector in preference to SIMD. Vector math units don't seem to be a fad from the age of Cray, and the RISC-V criticism appears

RISC-V appears to be implementing vector in preference to SIMD. Vector math units don't seem to be a fad from the age of Cray, and the RISC-V criticism appears to be that SIMD is too much of a niche specialization for a general purpose processor. https://medium.com/swlh/risc-v-vector-instructions-vs-arm-and-x86-simd-8c9b17963a31 https://medium.com/swlh/risc-v-vector-instructions-vs-arm-an...