5 ms·
C's pre/post-increment is from B which was designed for an older arch, not PDP, and B still had the pre/post increment and decrement. It's now a well known misc
by veltas 5y ago
C's pre/post-increment is from B which was designed for an older arch, not PDP, and B still had the pre/post increment and decrement. It's now a well known misconception that C was based on the PDP's instructions, it doesn't hold water with the facts. C did redesign for one thing on the PDP and that's byte addressing... and we're still using byte addressing most places, and frankly if you don't then C isn't incapable with that.
- shakow 5y ago> and we're still using byte addressing most places Which is a masquerade in itself, as in the silicon, addressing works at the memory line level.
- bodhiandphysics 5y agoThe cpu bus is what’s important. Bus addressing us at the byte level
- shakow 5y agoOn modern CPU, byte-level addressing is but smoke and mirrors for what is a fetch of a line-sized memory chunk followed by a mask-and-shift.
- bodhiandphysics 5y agoNot at the ISA level. Programmers don’t have access to the smoke and mirrors besides some cache management stuff
- p_l 5y agoDepends on the cpu specific, and a lot of non-x86 designs made it explicit that memory is not byte addressable without special steps. This makes those architectures incompatible with latest C and C++ though, because they require simultaneous, concurrent, atomic access to bytes at a time
- bodhiandphysics 5y agoThe most important non x86 arch is aarch64 which is in fact byte addressable (more so than x86)! So is mips64.
- bodhiandphysics 5y agoUsing c on a word machine is just a bad idea.
- shakow 5y agoBut x86_64 ISA is smoke and mirrors; proof is the large increase in performances that can obtained when one is aware of these tricks.
- flohofwoe 5y agoYet pointers are byte-granular. A more interesting question is rather, why are pointers no bit-granular by now, it would just "waste" 3 bits, and 2.3 exabytes ought to be enough for anybody ;)
- aap_ 5y agoThe PDP-10 has variable width byte pointers, but 8 bit bytes are what caught on.