I don't think it would be a bad idea to make a small extension to RISC-V that handles overflow and carry bits. Such functionality is sorely needed not just for

I don't think it would be a bad idea to make a small extension to RISC-V that handles overflow and carry bits. Such functionality is sorely needed not just for arbitrary-precision arithmetic (bignum libs, Python, Ruby, Smalltalk, ...), but more importantly for languages that rely on checking overflow (Rust, Ada, Swift, ...). Implementing the flags as register metadata is probably the best way, yes. A "pcnt" instruction is already in the "B"it manipulation extension, which IMHO should be compulsory for a non-embedded RISC-V CPU anyway.