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I think that’s the OP’s point? Apple optimised the snot out of their chip for the code they run. Vertical integration works, in other words?
by pja 5y ago
I think that’s the OP’s point? Apple optimised the snot out of their chip for the code they run.
Vertical integration works, in other words?
- MaxikCZ 5y agoSure, vertical integration is nice, but why is it so hard - maybe even impossible, to achieve similar results without it? Windows is such an entrenched ecosystem with millions of PCs running it. The code running on most of them isn't complete blackbox. I find weird that Intel and AMD are not able, despite their cooperation with Microsoft, to achieve similar kinds of results.
- paulryanrogers 5y agoAre there any 5nm CPUs available yet for x86?
- acdha 5y agoThis isn’t a recent problem. Sometimes those companies work together but they often are at cross purposes because they each have different incentives whereas at Apple they all report to the same person.
- howinteresting 5y agoIt's a top-down versus decentralized, market-driven approach, with all the upsides and downsides of each.
- howinteresting 5y agoAMD and Apple aren't playing on a level field currently. We'll see how well the 5nm AMDs with the 3d stacked cache perform when they come out next year.
- addicted 5y agoMore likely, being able to use a new architecture that isn’t burdened with decades of legacy compatibility works better than an architecture that is burdened with decades of backward compatibility.
- acdha 5y agoARM isn’t new and hasn’t been a performance champ for most of the decades it’s been around. The other ARM server implementations tended to be slower but better at perf/watt or perf/dollar — Apple changed that with absolute performance wins as well. That suggests that it’s more the execution by their team than an innate architectural advantage, esophagus given how many other cleaner architectures were wiped out by x86.
- saagarjha 5y ago> somehow run all their arm code in a way that emulates the M1 instructions on a regular ARM chip The comment gave me the impression that the author may believe M1 has some special instructions for reference counting; it does not.
- fulafel 5y agoThat's not correct. Architecture generally refers to the ISA and the gp comment referred to special M1 instructions.