That design is badly missing some registers (D-type flip-flops) -- the whole "let's read/write multiple bytes and discard the first one because the ESP is not r

That design is badly missing some registers (D-type flip-flops) -- the whole "let's read/write multiple bytes and discard the first one because the ESP is not ready yet" seems like a super hacky solution. A pair of something like 74574's would make this so much easier. When sending to ESP, register latches the last byte written and then ESP can read it at its leisure. When reading from ESP, ESP pre-loads the data into register, and then gameboy reads data from the register. This generates interrupt which ESP uses to load next byte into register. Moreover, there might be a right logical series which will be compatible with both 3.3 and 5V busses. Then one could replace the level converters with register, keeping the overall complexity about the same.