Does someone know what's happening with these PCI mappings? Is this memory-mapped by an address decoder on the motherboard (or north/south bridge)? Or is it a

Does someone know what's happening with these PCI mappings? Is this memory-mapped by an address decoder on the motherboard (or north/south bridge)? Or is it a hint to the OS that they should map it here? Maybe the PCI I/Os are really there, hardwired on the motherboard, but use a higher impedance, though that would be very hacky. Or maybe they're mapped from that address, and the highest bits do not count, as address decoding is only performed on the lower bits? With physical memory shadowing parts of the physical address space? Or maybe this is just virtual address space shenanigans? In that case, how does the OS figure how to talk to PCI or the RAM based on the provided mappings? I might be able to find that information by looking at the specifications and whatever ACPI docs I can find, but if someone already knows how it works, I'd really appreciate a few pointers.