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This would be wonderful - I hacked on a CPU architecture and brought it to an FPGA by manually converting a Logisim [1] schematic to VHDL. It's still terribly b
by miselin 5y ago
This would be wonderful - I hacked on a CPU architecture and brought it to an FPGA by manually converting a Logisim [1] schematic to VHDL. It's still terribly buggy.
Maybe it'd be possible to write an integration for the (unmaintained) Logisim to export the schematic to a HDL of some sort to get close.
[1] http://www.cburch.com/logisim/ http://www.cburch.com/logisim/
- ChickeNES 5y ago> Maybe it'd be possible to write an integration for the (unmaintained) Logisim to export the schematic to a HDL of some sort to get close. No need, Digital (https://github.com/hneemann/Digital https://github.com/hneemann/Digital) already does this: > A circuit can be exported to VHDL or Verilog. There is also direct support for the BASYS3 Board and the TinyFPGA BX board. See the documentation for details. The examples folder contains a variant of the example CPU, which runs on a BASYS3 board.