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It doesn't have to be. I once made a julia->verilog transpiler that even recompiled your julia functions with verilator, so you could verify that the code was
by dnautics 5y ago
It doesn't have to be. I once made a julia->verilog transpiler that even recompiled your julia functions with verilator, so you could verify that the code was correct.
https://github.com/interplanetary-robot/Verilog.jl https://github.com/interplanetary-robot/Verilog.jl
Of course, gaining traction on something like this is tricky.
I actually think Erlang/BEAM would be a great choice for making EDA tools, because it has concurrent execution model that you could probably very easily make play nice in rudimentary simulations of circuits that have triggers (`always @` sort of stuff.
- rowanG077 5y agoThis is not a transpiler. You are using Julia as a templating language for HDLs.