3 ms·
> ... Compiling simple programs into silicon should be like using llvm or gcc: fast, automated, and accessible. Some benchmarks would have been helpful. What k
by pezzana 5y ago
> ... Compiling simple programs into silicon should be like using llvm or gcc: fast, automated, and accessible.
Some benchmarks would have been helpful. What kind of performance gain are there to make?
- jawnv6 5y agoThe execution time is going to seem really zippy after the 8 week wait for the chips to be fabbed.
- nojs 5y agoI’d also like to know this. In general, what performance gains would one expect to see from an IC custom made for a very specific algorithm versus a modern CPU?
- artisanspam 5y agoThis isn't a compiler. All this is is a build tool that calls compilers in the background. So benchmarks for this tool aren't really useful. However, for benchmarks between actual FOSS SystemVerilog compiler front-ends (i.e. language parsing), I've found this[1] chart from CHIPS Alliance to be useful. Some of the tools listed are parsing + synthesis (yosys) or front-end + simulator (icarus, verilator). Several are just parsers. [1]: https://chipsalliance.github.io/sv-tests-results/ https://chipsalliance.github.io/sv-tests-results/