Alpha AXP get rid of branch delay slot from the very start, precisely because they planned it to be architecture that is viable for next 20-25 years. And I thi

Alpha AXP get rid of branch delay slot from the very start, precisely because they planned it to be architecture that is viable for next 20-25 years. And I think that RISC-V is right on repeating that design decision. ;) It also looks like Alpha was introduced a bit earlier than SuperH and that makes me wonder why they still wanted branch delay slot. It is nothing but trouble across the board (tools, hardware design, etc) for couple of percents of execution speed. Which can easily be achieved just by using register bypass and that bypass logic will cost less and bring more, effectively reducing pipeline length by one stage.