In another blog post from 2008 he seems to say that FPGA uses way too much on interconnects, some other technology called HRSA realizes the problem, BitGrid tak

In another blog post from 2008 he seems to say that FPGA uses way too much on interconnects, some other technology called HRSA realizes the problem, BitGrid takes it to an extreme [1]. So you can build simple circuits like muxes and latches. What about complex circuits like adders or registers? Could you build a CPU with a BitGrid, or do you run into problems (e.g. topological issues because the clock needs to be routed everywhere)? The real thing for further progress is some kind of compiler that can automatically take a design in an HDL (possibly a subset of an existing HDL or a custom HDL if supporting one of the popular HDL's in full is too ambitious). That would let you simulate complex designs and study whether topological issues or other fundamental problems arise in practical designs, work out approaches for dealing with them, measure how much penalty you pay, and see whether you can really get by without interconnects. Just some random thoughts, I'm not really a hardware guy. Hope mikewarrot shows up here, would be fascinating to get some updates and maybe ask a few questions :) [1] https://bitgrid.blogspot.com/2008/07/hrsa-close-but-no-cigar.html https://bitgrid.blogspot.com/2008/07/hrsa-close-but-no-cigar...