It's not exactly RISC VS CISC. Maybe SISC - "Simplified" instruction set computing, perhaps. ARM isn't exactly super complicated in this particular aspect (it

It's not exactly RISC VS CISC. Maybe SISC - "Simplified" instruction set computing, perhaps. ARM isn't exactly super complicated in this particular aspect (it is elsewhere), but in this case the designers basically chose to make branches simpler at the expense of code that needs to check overflows (or flags more generally) RISC-V was born partly out of a desire for a teaching ISA, also, so simplicity is a boon in that context too.