Note that with the newly-ratified B extension, RISC-V has BIC (called ANDN) as well as ORN and XNOR. In addition to the actual ALU instructions doing the add w

Note that with the newly-ratified B extension, RISC-V has BIC (called ANDN) as well as ORN and XNOR. In addition to the actual ALU instructions doing the add with carry, for bignums it's important to include the load and store instructions. Even in L1 cache it's typically 2 or 3 or 4 cycles to do the load, which makes one or two extra instructions for the arithmetic less important. Once you get to bignums large enough to stream from RAM (e.g. calculating pi to a few billion digits) it's completely irrelevant.