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Mind you that raw core performance is not everything, memory bandwidth and caches are crucial to make sure the CPU isn't waiting for data all the time.
by pantalaimon 5y ago
Mind you that raw core performance is not everything, memory bandwidth and caches are crucial to make sure the CPU isn't waiting for data all the time.
- sanxiyn 5y agoYes, but SPECint includes all such effects. As long as SPECint benchmarks (such as GCC) are representative of your workload, it works fine.
- tlb 5y agoI trust that the Apple benchmarks include all such effects. I'm less convinced that the RISC-V "projections" include them. SPECint2006 is supposed to be measured with real memory and an OS. Per-GHz numbers can't accurately reflect main memory latency, since its speed doesn't scale with the CPU clock.
- spear 5y agoRight, and "per GHz" numbers are also not very useful because you can't just crank up the GHz when you need performance. Even with the same process technology, you can't assume different microarchitectures will max out at the same frequency.
- snvzz 5y agoYou're right, and remarkably Apple has found a major roadblock to clock speeds while using ARMv8. M1's L1 cache is huge, as a workaround to ARMv8's poor code density. Larger cache means lower clocks, unfortunately there's no way around speed of light.
- ksec 5y ago>You're right, and remarkably Apple has found a major roadblock to clock speeds while using ARMv8. What? Where is this claim coming from?