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I believe because the original AS/400 hardware used a proprietary CPU (Called IPMI ?) and proprietary RAM that had extra space for tag bits. When the AS/400 wa

I believe because the original AS/400 hardware used a proprietary CPU (Called IPMI ?) and proprietary RAM that had extra space for tag bits. When the AS/400 was moved to POWER processors, IBM added extensions for OS/400 called PowerPC AS[0], and uses some "magic" to store a tag bit in the ECC bits of standard RAM. Also, "Fortress Rochester" by Frank Soltis (the follow up to Inside the AS/400) gives a detailed look at the differences compared to other systems. [0] https://www.devever.net/~hl/ppcas https://www.devever.net/~hl/ppcas

skissane 5y ago
> I believe because the original AS/400 hardware used a proprietary CPU (Called IPMI ?) Called IMPI (Internal MicroProgrammed Interface), the CPU architecture used by the CISC AS/400’s was the same as that used by the earlier System/38. Documented in this manual: http://bitsavers.org/pdf/ibm/system38/SC21-9037-3_IBM_System_38_Internal_Microprogramming_Instructions_Formats_and_Functions_Reference_4th_ed_198508.pdf http://bitsavers.org/pdf/ibm/system38/SC21-9037-3_IBM_System... With AS/400, IBM stopped publicly so documenting these kinds of details, but most of that manual still applies to CISC AS/400. And, I believe IBM included a disassembler in the diagnostic tools shipped with the OS, which I assume would have known about any new instructions, so it would be possible (with sufficient effort) to work out what the changes in CISC AS/400 were. The IMPI instruction set has some resemblances to the IBM 370 mainframe instruction set, but is not compatible with it.