3 ms·

Learning about CRCs was fun for me. I had to dig into the math to figure out how to calculate the 32 bit ethernet CRC for packets being sent across a 256 bit b

by bcrl 5y ago

Learning about CRCs was fun for me. I had to dig into the math to figure out how to calculate the 32 bit ethernet CRC for packets being sent across a 256 bit bus for a 10 Gbps NIC I implemented on a Xilinx KC705 a few years ago. I found this guide from 1993 quite informative: https://zlib.net/crc_v3.txt https://zlib.net/crc_v3.txt

omegalulw 5y ago
Why would there not be any CRC library for an FPGA?
- bcrl 5y ago
  The purpose of the exercise was to improve my ability to develop functionality using Verilog. Using a library would have been too easy.