Would it, or would we have had a convention in later versions that the low N words of the memory map actually refer to registers? This would not resolve the ins

Would it, or would we have had a convention in later versions that the low N words of the memory map actually refer to registers? This would not resolve the instruction size issues of a memory-to-memory encoding, but it would give two paths to register file growth (growing the number of architectural registers by increasing N as the architecture evolves; and the usual register renaming games), both of which would be software-compatible with previous versions. Having eight named registers and 256 -- or 4096 -- numbered fast registers, plus renaming on top of that, actually seems like an interesting path.