5 ms·
These are 1-2k LUT devices. Even the smallest Spartan - XC7S6 - is 6K LUTs. It's not enough to even mildly inconvenience the leaders.
by shash 5y ago
These are 1-2k LUT devices. Even the smallest Spartan - XC7S6 - is 6K LUTs. It's not enough to even mildly inconvenience the leaders.
- AussieWog93 5y agoI don't see that necessarily as a negative. 50c FPGAs with 1k LUTs won't directly compete against Xilinx or Altera's flagship offerings (or in many cases even their low-end ones, as you rightly point out) - but it will create a new market for low-cost, low-power semi-complex custom glue logic.
- CuriousCosmic 5y agoI agree. There's so many little use cases where a tiny FPGA would fit in perfectly but the cost of the powerful mainline competition make it a non-starter. If these can stay cheap and continue to draw as low power as they do I can see them carving out a very nice and healthy niche in the space.
- shash 5y agoAgreed. There are lots of downstream applications where these could do a lot. I just meant, GP's point doesn't add up.
- arcticbull 5y agoI assume this is just their thin-edge product. Gotta start somewhere, and it may as well be carving out a new niche.
- RF_Savage 5y agoI see it more as competing with Lattice, Microchip and things like Intel MAX10.
- LargoLasskhyfv 5y agoWhat is stopping you from using 16 of them? For maybe bit-slicing? The PCB-layout, routing/timing and EMF?
- arcticbull 5y agoIt's just a pain to write and configure that many different devices each with I assume external SPI ROMs and bitstreams. Timing analysis would also apply locally, and you'd have to propagate that through yourself. Since they're each buffered at the edges, I don't think EMF is a big consideration, but timing would be a challenge. I expect routing to be the least problematic as you can just route the signals to external pins in whatever configuration you want.