3 ms·
Just as an aside on the topic: I spent the weekend neck deep in learning how to do an "aggregated auto increment", in which a single thread in a "coalesced gro
by chrsig 5y ago
Just as an aside on the topic:
I spent the weekend neck deep in learning how to do an "aggregated auto increment", in which a single thread in a "coalesced group" (all of the threads in the block currently running that instruction) will increment a pointer by the number of threads in the group.
It's a very useful mechanism to implement a parallel queue / bump allocator, or to have an intermediary reduction step, without having to deal with shared memory.
https://developer.nvidia.com/blog/cooperative-groups/ https://developer.nvidia.com/blog/cooperative-groups/
https://developer.nvidia.com/blog/cuda-pro-tip-optimized-filtering-warp-aggregated-atomics/ https://developer.nvidia.com/blog/cuda-pro-tip-optimized-fil...
- raphlinus 5y agoYeah, sometimes atomics perform way better than you expect them to. Check out the linkedlist benchmark in my suite, 12.1 G elements/s on AMD 5700 XT using DX12. That's a respectable fraction of raw memory bandwidth. Carrying over intuition from CPU land, you'd expect it to be very slow. Looking at the ISA[2] you can get a glimpse of the magic that happens under the hood to make that happen. (Note: this test case is slightly simplified from what's in the repo for pedagogical reasons). [1]: https://github.com/linebender/piet-gpu/blob/master/tests/shader/linkedlist.comp https://github.com/linebender/piet-gpu/blob/master/tests/sha... [2]: https://shader-playground.timjones.io/da907f46d8bace9e5db7bd0f9314b488 https://shader-playground.timjones.io/da907f46d8bace9e5db7bd...