3 ms·
Jeff - you mentioned "Pi's bus being only Gen 2 and x1". Do you see a linear scaling if those interfaces on the Pi are improved - i.e. is there anything else t
by MR4D 5y ago
Jeff - you mentioned "Pi's bus being only Gen 2 and x1".
Do you see a linear scaling if those interfaces on the Pi are improved - i.e. is there anything else that looks like a near-term bottleneck if those are improved?
Great article - I love watching your youtube channel as well
- geerlingguy 5y agoRight now the CPU itself is also a bottleneck quite often. I'm often puzzled by why certain things slow down and find often the Pi's CPU architecture is slightly 'weird', especially in how the PCIe bus works. I hope whatever comes next will have a more standard PCIe bus, and if nothing else Gen 3.1 or Gen 4, even if only x1 (that bandwidth would be a great boost).