5 ms·
I wonder how that compares with ddr5 which has a controller and new power systems for similar reasons then. Combined with the upcoming CXL bus stuff it makes m
by simcop2387 5y ago
I wonder how that compares with ddr5 which has a controller and new power systems for similar reasons then. Combined with the upcoming CXL bus stuff it makes me womder if it'll happen it's just the interface wasn't ready yet
- wmf 5y agoDDR5 does not have a controller on the DIMM; it's nothing like the complexity of Optane DIMMs. I agree that CXL seems like a better fit for Optane than a memory bus.
- simcop2387 5y agoah yes, it's just a clocking driver. the ecc requirements are into the ram chips themselves. i had misremembered. https://www.rambus.com/memory-and-interfaces/server-dimm-chipsets/ddr5-dimm-chipset/ https://www.rambus.com/memory-and-interfaces/server-dimm-chi...
- bcrl 5y agoIt's more a question of Amdahl's law: the introduction of SSDs brought I/O latencies from the 5 to 10 milliseconds of HDDs down to tens to hundreds of microseconds. Going from tens of microseconds to 100-200 nanoseconds is much less of an improvement for most general purpose workloads.