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I assumed it was software pdp11, but no, it is an "FPGA implementation of PDP-11" http://www.strobedata.com/home/ospreydx.html http://www.strobedata.com/home/o
by emmelaich 5y ago
I assumed it was software pdp11, but no, it is an "FPGA implementation of PDP-11"
http://www.strobedata.com/home/ospreydx.html http://www.strobedata.com/home/ospreydx.html
- andrewl 5y agoStrobe Data's site reminds me of Berkshire Hathaway's: https://www.berkshirehathaway.com/ https://www.berkshirehathaway.com/ I think neither business needs to convince anybody of anything. If you need what Strobe is selling and can afford it, they probably made the sale.
- foo92691 5y ago"Copyright © 1978-2021 Berkshire Hathaway Inc." Ok the web page looks old but maybe not that old
- lukeh 5y agoCould be auto-generated.
- zeckalpha 5y agoA subset of the content could be that old.
- eesmith 5y agoThe oldest I found was from 1977 - https://www.berkshirehathaway.com/letters/1977.html https://www.berkshirehathaway.com/letters/1977.html . Here's the 'Chairman's Letters To The Shareholders (Historical Compilation)' from the 1997 version of their site - https://web.archive.org/web/19970530212045/http://www.berkshirehathaway.com/letters/letters.htm https://web.archive.org/web/19970530212045/http://www.berksh... , with yearly publication.
- deleted 5y ago[deleted]
- jcims 5y agoI did some security work for a bank that was running a software-emulated HP3000 for their core banking platform to run on. They were so scared of us breaking something that they had us write in the contract we wouldn't touch the production unit whatsoever. In retrospect it was a good idea because we killed one of their dev boxes with a scan and it took a couple of days for them to get it back online.
- mohanmca 5y agoThanks!
- throwawaylinux 5y agoI wonder why not software emulated.
- deleted 5y ago[deleted]
- mikewarot 5y agoBecause it had to be cycle accurate to work with the existing hardware, something you can't guarantee in software.
- throwawaylinux 5y agoYou definitely can, we use cycle accurate simulators to model logic. These models can be tied in to emulators to give them cycle accurate timing information. In terms of expressiveness, digital logic can't "do" anything that software can not (including drive real electrical / analog IOs provided the software and the digital logic have interfaces for). Whether you implement the pdp11 in software or logic, either way you still have to create it to take into account all the timing details of the original hardware. It's just some operations can be done much faster in hardware, but I doubt any part of the pdp11 can't easily be emulated in software on modern CPUs with a lot of timing margin to achieve real-time cycle accuracy. I could be wrong because pdp11 I don't know much about, but for an early simple RISC pipeline of similar performance it is certainly possible. I assume this is just a solution that works and is supported and they've been using for a long time. It would
- froh 5y agoAnd this works in real time? In simulation it's sufficient to compute accurate cycle information, yet slower than real time, or with jitter. In contrast to that "cycle accurate modelling" the goal here was to replace a pdp11 in operation.
- throwawaylinux 5y agoNot on the software I'm involved with, but that models a vast modern system running at GHz rather than a system with some tens of thousands of transistors running at 10-20MHz.
- amirhirsch 5y agoMy first job out of college in 2007 was building a pdp-11/70 emulator on virtex-5 fpgas to replace the control computers for CANDU nuclear reactors. We had a punched-tape and microfiche of the xxdp diagnostic test suite to pass: http://bitsavers.org/pdf/dec/pdp11/microfiche/ftp.j-hoppe.de/bw/gh/AH-7968F-MC__PDP11-70__11-70_CPU_%232__CEKBBF0__%28C%2975,80.pdf http://bitsavers.org/pdf/dec/pdp11/microfiche/ftp.j-hoppe.de... Several nuances that we replicated were probably never used by the production software. For example the order of execution of a floating point instruction trap followed by a stack pointer trap due to the pipelining of the fpu instructions, even though we weren’t executing anything out-of-order. I also produced the correct partial result for the division algorithm in the event of overflow condition.
- ComputerGuru 5y agoTest vectors are the biggest secret sauce for any CPU or microcontroller. Word on the street is that the STM32Fxxx test vectors were stolen and that’s why you have perfect replicas being churned out of China, not like the typical cases where your devices fail with the fake chip installed.
- sydthrowaway 5y agoI mean, with a list of all test input vectors and expected outputs, you could derive the entire chip right? It’s just logic gates.
- ComputerGuru 5y agoYou can for some things, but that wouldn’t be a very efficient result (it’s basically going to give you a massive lookup table). It’s also not that simple since we are not talking about stateless behavior - think more along the lines of interrupts, counters, events, dma, analog input/output, etc. none of which really map into a straightforward input:output relationship, most of which can be used together to some extent to form a gestalt. Even with the test vectors it is a Herculean task.
- enriquto 5y ago