3 ms·
> They could do something gnarly like fit 8 sockets on a single board Those sockets need to communicate with each other, and extremely quickly. And that I/O is
by kllrnohj 5y ago
> They could do something gnarly like fit 8 sockets on a single board
Those sockets need to communicate with each other, and extremely quickly. And that I/O is very, very expensive in terms of power. Even with that you still end up with poor performance scaling, especially with anything that isn't numa aware (which almost nothing is)
So no, that extrapolation doesn't make sense. But even ignoring that missing cost, 8x M1 Max's would be ~800w, give or take. That would work in a Mac Pro replacement, but that'd still be a significant power increase over many of the existing models.
- fulafel 5y agoInteresting idea about the power usage of the interconnect. I don't remember this being discussed as an issue in tech press writings about multisocket Xeon or EPYC systems. Do you happen to have any references?
- mlyle 5y agohttps://images.anandtech.com/doci/13124/IF%20Power%20EPYC.png https://images.anandtech.com/doci/13124/IF%20Power%20EPYC.pn... Here's EPYC 7601's "IF" power (it's really all the uncore power) vs. the core power. Going outside the chip means swinging lots of capacitance up and down, and modern interconnects swing that capacitance fast.
- sroussey 5y agoAlso why pci 4 and 5 require much more cooling for more than the cpu.
- kllrnohj 5y agoAnd that's only for a 2p setup. An 8p setup would need even more interconnects per CPU depending on the architecture (eg, ring, mesh, etc..), which would have further impacts to performance depending on which tradeoffs are made.