Twice as many channels so twice as many cache misses in flight. The Anandtech shows significant gains on multi core workloads. So the I9-12900K with DDR4 show

Twice as many channels so twice as many cache misses in flight. The Anandtech shows significant gains on multi core workloads. So the I9-12900K with DDR4 shows 61.33 int, 59.55 FP. With DDR5 it gets 80.53 Intel and 81.85. Some of that is increased bandwidth, but having more memory requests in flight helps as well. Imagine all the cores generating cache misses and you have 2 channel of memory. When a channel handles a transaction it's unavailable for 40 ns (keep in mind that @ 3GHz with 2 instructions per cycle that's 240 instructions per core). Now with 4 channels you can have twice as many transactions in flight and your cores spend less time idle and waiting on memory. So over a 30% increase in performance when going from DDR4 to DDR5, of course this doesn't matter if your application has a high rate of cache hits.