This sounds very similar to Virta Labs Powerguard: https://ce.engin.umich.edu/stories/virta-labs-introduces-powerguard https://ce.engin.umich.edu/stories/virta

This sounds very similar to Virta Labs Powerguard: https://ce.engin.umich.edu/stories/virta-labs-introduces-powerguard https://ce.engin.umich.edu/stories/virta-labs-introduces-pow... except that Powerguard looks at the power side channel rather than the RF emissions side channel (although there is likely some correlation between the two). The company eventually dropped the product and pivoted to other products. If I remember correctly, Kevin Fu said the reason was the number of false positives; the embedded systems were complicated enough that there were often little used subroutines that would very occasionally get called, setting off the anomaly detector. The timing of when those subroutines get called was often unpredictable. Strange as it may seem, even embedded computers are no longer deterministic due to interrupt and thread handlers, external trigger events, user interfaces, and noise. Unless the hardware is really simple and you can exercise all branches of all the software, this kind of anomaly detection does not seem likely to work well. Especially for an FPGA running machine learning software where there are likely to be all kinds of fuzzy boundary conditions that can cause changes in outcomes. A 1.83 percent false positive rate may sound good, but if you are doing hundreds of integrity tests per day then the system would be indicating the FPGA is compromised several times per day.