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I am not a chiphead either (but I used to live with some) I think easier decoders => shorter pipeline, less silicon footprint for decode, possibly more silicon
by dnautics 5y ago
I am not a chiphead either (but I used to live with some)
I think easier decoders => shorter pipeline, less silicon footprint for decode, possibly more silicon for reordering logic, less dark silicon, etc.
To be fair the chipheads I lived with were gaga about VLIW, so there was certainly a bias there.
- paulmd 5y agoI mean, VLIW is fantastic as long as you have very predictable workloads with high parallelism and little branching that are very easily statically scheduled. If you want to design a DSP or something, where you know it’ll be 100% saturated all the time with an absolutely predictable workload, it’s extremely efficient. Same for AMD Terascale GPUs back in the days before async compute and other GPGPU style tasks took over.