5 ms·

Semiconductor manufacturing R&D and pathfining includes many expensive dead ends. Massive volume is required to justify the gigantic upfront cost to develop a

Semiconductor manufacturing R&D and pathfining includes many expensive dead ends. Massive volume is required to justify the gigantic upfront cost to develop a new process every 2-4 years (overlapping with previous and next process node). Economist would say that volume gives you: 1) Increasing marginal returns after massive fixed capital investments. 2) increasing returns to scale from variable investments when volumes increase.

SavantIdiot 5y ago
Every CPU project I worked on at Intel from 1997-2010 was cancelled. That's 13 years of one senior engineering salary that never turned a profit, let alone the thousand other people on the related teams. One could argue the failed learnings helped guardrail successful products, but my internal perspective says, Nah. Intel throws/threw a staggering amount of money at failed projects. Wondering if Gelsinger will shake out the numerous boondoggles that litter that company.
- balls187 5y ago
  Several air-frames met similar fates at various defense contractors.
- bhouston 5y ago
  This is fascinating. Where were they cancelled? I know about Larrabee and Itanium of course. But the others? Would they have succeeded in the market if pushed? Or was Intel just going in all directions a bit randomly without strong purpose?
  - SavantIdiot 5y ago
    Itanium shipped, and I have a soft spot in my heart for it, VLIW was brilliant. The hate is administered by knownothings, it was a CPU for engineers. Larrabee is Xeon Phi. Aren't they shipping today? These never saw the light of day, only one taped out. I don't know why, I was too busy engineering to care: - a Pentium3 + on-die, integrated graphics - a 7.2 GHz pentium 4 (yes, 7.2 GHz. in 2002) - the successor to the i740 graphics which was cannibalized for the i815 chipset - another Pentium 4 variant which I can't recall what it was, but we spun up an entire arch team to work on it - variants of Itanium (McKinley, Madhall) > Or was Intel just going in all directions a bit randomly without strong purpose? DING DING DING.
    - throwawaylinux 5y ago
      > Itanium shipped, and I have a soft spot in my heart for it, VLIW was brilliant. The hate is administered by knownothings, it was a CPU for engineers. Around the 90s, the big OOOE scare and push to move away from it seemed to be based on projections showing wire delay and super-linear scaling structures like schedulers would bite OOOE very hard and make it nonviable. This might have been technically true -- Pentium Pro reorder buffer was 20 entries while new cores might have only 10 times that, about an order of magnitude. Processor widths only by about 2x. IPC has increased about an order of magnitude as well (ignoring SIMD). While transistor density increased 3 or 4 in that time. So I don't see a huge problem with that general prediction. What I wonder about is why on earth they thought in-order VLIW could solve this in a better way. Itanium scaling ran out of steam well before the out of order designs. And huge widths never happened or probably didn't help much because they're always just going to get stuck on taken branches, data dependencies, etc. I liked Itanium when it first came out, it was a floating point monster and even on integer it shaped up pretty well against the likes of POWER4 in the TPC-C wars, exchanging the lead for several generations. But it became apparent that it depended on heroically fast (and therefore sadly tiny) L1 cache which halted its frequency scaling. It depended on a heroically large L3 cache which was became a problem in the multi core era. All because it dealt badly with dynamic hazards like cache misses, and executing beyond them to generate memory level parallelism. Sure it had advanced loads which were very cool on paper, but never really were such a capable substitute. I don't hate EPIC/VLIW. Some people hate Itanium because they claim it killed of a lot of diversity in the CPU market. I don't think that it did, and wouldn't hate it even if I thought it did. I can see why it failed though, and that's because it was technically inferior to out of order designs for most of its target markets.
      - ethbr0 5y ago
        It would be fascinating to teach a 3xx level course on Itanium aspirations, design, and failures, because I think they literally speak to everything that was happening in microarch (and much of what has happened since) from 1990 - 2020.
- happycube 5y ago
  If they had spent just a bit of that money to keep the DEC Semi team together w/o interference, intel would probably own the ARM SOC market right now.
- totalZero 5y ago
  Do cancelled projects at that level of expertise also contribute to institutional knowledge? I presume you generate information from near misses, and the resulting intuitions get applied and shared when you work on the next project with the next team.
- Nokinside 5y ago
  Even if every Intel CPU project was success, it would not matter when Intel fabs are not competitive. Intel decided not to do EUV when others did and squeeze yet another node from older technology and it backfired phenomenally. Even when everything is done right, the risks are high. The competitive high-end node business went from 4 to 2 in one generation. From Intel, GF, TSMC, Samsung to TSMC, Samsung. Intel is trying to get back and they have to burn billions.

SavantIdiot 5y ago

Every CPU project I worked on at Intel from 1997-2010 was cancelled. That's 13 years of one senior engineering salary that never turned a profit, let alone the thousand other people on the related teams. One could argue the failed learnings helped guardrail successful products, but my internal perspective says, Nah. Intel throws/threw a staggering amount of money at failed projects. Wondering if Gelsinger will shake out the numerous boondoggles that litter that company.

balls187 5y ago
Several air-frames met similar fates at various defense contractors.
bhouston 5y ago
This is fascinating. Where were they cancelled? I know about Larrabee and Itanium of course. But the others? Would they have succeeded in the market if pushed? Or was Intel just going in all directions a bit randomly without strong purpose?
- SavantIdiot 5y ago
  Itanium shipped, and I have a soft spot in my heart for it, VLIW was brilliant. The hate is administered by knownothings, it was a CPU for engineers. Larrabee is Xeon Phi. Aren't they shipping today? These never saw the light of day, only one taped out. I don't know why, I was too busy engineering to care: - a Pentium3 + on-die, integrated graphics - a 7.2 GHz pentium 4 (yes, 7.2 GHz. in 2002) - the successor to the i740 graphics which was cannibalized for the i815 chipset - another Pentium 4 variant which I can't recall what it was, but we spun up an entire arch team to work on it - variants of Itanium (McKinley, Madhall) > Or was Intel just going in all directions a bit randomly without strong purpose? DING DING DING.
  - throwawaylinux 5y ago
    > Itanium shipped, and I have a soft spot in my heart for it, VLIW was brilliant. The hate is administered by knownothings, it was a CPU for engineers. Around the 90s, the big OOOE scare and push to move away from it seemed to be based on projections showing wire delay and super-linear scaling structures like schedulers would bite OOOE very hard and make it nonviable. This might have been technically true -- Pentium Pro reorder buffer was 20 entries while new cores might have only 10 times that, about an order of magnitude. Processor widths only by about 2x. IPC has increased about an order of magnitude as well (ignoring SIMD). While transistor density increased 3 or 4 in that time. So I don't see a huge problem with that general prediction. What I wonder about is why on earth they thought in-order VLIW could solve this in a better way. Itanium scaling ran out of steam well before the out of order designs. And huge widths never happened or probably didn't help much because they're always just going to get stuck on taken branches, data dependencies, etc. I liked Itanium when it first came out, it was a floating point monster and even on integer it shaped up pretty well against the likes of POWER4 in the TPC-C wars, exchanging the lead for several generations. But it became apparent that it depended on heroically fast (and therefore sadly tiny) L1 cache which halted its frequency scaling. It depended on a heroically large L3 cache which was became a problem in the multi core era. All because it dealt badly with dynamic hazards like cache misses, and executing beyond them to generate memory level parallelism. Sure it had advanced loads which were very cool on paper, but never really were such a capable substitute. I don't hate EPIC/VLIW. Some people hate Itanium because they claim it killed of a lot of diversity in the CPU market. I don't think that it did, and wouldn't hate it even if I thought it did. I can see why it failed though, and that's because it was technically inferior to out of order designs for most of its target markets.
    - ethbr0 5y ago
      It would be fascinating to teach a 3xx level course on Itanium aspirations, design, and failures, because I think they literally speak to everything that was happening in microarch (and much of what has happened since) from 1990 - 2020.
happycube 5y ago
If they had spent just a bit of that money to keep the DEC Semi team together w/o interference, intel would probably own the ARM SOC market right now.
totalZero 5y ago
Do cancelled projects at that level of expertise also contribute to institutional knowledge? I presume you generate information from near misses, and the resulting intuitions get applied and shared when you work on the next project with the next team.
Nokinside 5y ago
Even if every Intel CPU project was success, it would not matter when Intel fabs are not competitive. Intel decided not to do EUV when others did and squeeze yet another node from older technology and it backfired phenomenally. Even when everything is done right, the risks are high. The competitive high-end node business went from 4 to 2 in one generation. From Intel, GF, TSMC, Samsung to TSMC, Samsung. Intel is trying to get back and they have to burn billions.