Golden cove core highlights[1] include a 6 wide decoder (up from 4; M1 is 8), reorder buffer of 512 (up from 352 in Ice/Tiger/Rocket lake, or 224 in Skylake; M1

Golden cove core highlights[1] include a 6 wide decoder (up from 4; M1 is 8), reorder buffer of 512 (up from 352 in Ice/Tiger/Rocket lake, or 224 in Skylake; M1 is estimated around 650), and 12 execution units (up from 10 in Ice/Tiger/Rocket lake or 8 in Skylake). Still not as wide as the M1, but it looks like a huge step in the right direction on paper. [1] https://en.wikipedia.org/wiki/Golden_Cove https://en.wikipedia.org/wiki/Golden_Cove