4 ms·
Power consumption through an asic is P=CfV^2 aka power is capacitance times frequency times voltage squared. So power does scale linearly with frequency. When
by verall 5y ago
Power consumption through an asic is P=CfV^2 aka power is capacitance times frequency times voltage squared. So power does scale linearly with frequency.
When you gate on/off portions of a chip, you are changing the capacitance.
- wtallis 5y agoWhat that equation doesn't tell you is that the voltage necessary to make a chip run at 4GHz is higher than the voltage it needs to run at 1GHz. So in practice with real CPUs, increasing frequency also means increasing voltage, and thus power does not increase linearly. (Unless you have a chip that's configured to idle with unnecessarily high voltage.)