The convergence of RISC & CISC has shown that both things are true. A really simple ISA with a modern design can be pretty darn fast. At the same time, addition

The convergence of RISC & CISC has shown that both things are true. A really simple ISA with a modern design can be pretty darn fast. At the same time, additional ISA complexity helps you wring the utmost out of your hardware, and IMO also helps in the bazaar environment - macro ops let a menagerie of hardware do work in the way most efficient for itself without hardware-specific binaries. Underneath the covers, however, the underlying hardware complexity is an inherent property of modern performance. For example, branch prediction.