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Super dumb question (haven't taken a microprocessors class in over a decade): How hard would it really be to custom build a chip that was really simple, but mo
by 7thaccount 5y ago
Super dumb question (haven't taken a microprocessors class in over a decade):
How hard would it really be to custom build a chip that was really simple, but modern. I'm thinking like the 6502 in the Commodore, but much faster. Or is the complexity in x86 an inherent property of modern performance? I guess what I'm getting at, is could you build something that is actually pretty darn fast if you don't need to run a modern OS like windows or Linux on it, but keep it drastically simple?
I've been thinking it might be neat to have a blazing fast NUC sized computer that just boots into some barebones forth sitting on top of a few assembly words. Maybe with just enough peripherals to do some actual work (like load from SD card).
- ampdepolymerase 5y agoIt's called a FPGA; a software defined microprocessor (most higher tier processors can be reprogram to a certain extent through microcode, but a FPGA is a specialised chip designed specifically for this). You can get ridiculously high performance for your specific application, but it will never excel at general purpose computing. Good enough for Forth, great for ML, DSP, and number crunching, bad for running random apps from GitHub.
- 7thaccount 5y agoI've used FPGAs before (also ages ago). I guess I could create a simple chip on an FPGA and run a Forth on that, but I was thinking something more physical.
- d_tr 5y agoBut would you not need to use an FPGA anyway for experimentation and prototyping? If you want something more physical, fast and small you need a spot at an actual fab. There is no other alternative. You might also want to take a look at the "Minimal Fab" technology. I found out about it a year or so ago and it looked really interesting!
- 7thaccount 5y agoThank you!
- Koshkin 5y agoI find it kind of funny that majority of uses of FPGA is indeed to implement a simple CPU (basically a programmable state machine), and the problem at hand is then solved by writing a program for it.
- sgtnoodle 5y agoThere's inherent complexity in the x86 instruction decoder, but after decoding, modern x86 CPUs don't particularly resemble legacy x86 CPUs internally. The native machine code is all proprietary "micro ops". A lot of the performance gains over the last couple decades haven't come from machine code changes, but rather from various forms of pipelining and superscaling. Rather than run one instruction at a time, CPUs run hundreds of instructions at a time. The complexity of doing that is that many instructions often depend on the result of instructions immediately before them, and so the CPU needs a lot of shortcut paths internally to keep from stalling out. You could get to Ghz speeds with a custom ASIC, and you could use base RISC-V as a modern, not crufty ISA. It still won't be anywhere near as fast as a high end x86 or ARM CPU, though, unless it's similarly pipelined and superscaled.
- 7thaccount 5y agoSo, it sounds like there likely is unavoidable complexity if you want the screaming performance we're used to.
- sgtnoodle 5y agoYes, but specifically only for a general purpose CPU. You could make a CPU optimized specifically for forth or whatever, and likely achieve better performance for the number of transistors than otherwise. For example, if virtual memory isn't helpful, than you can omit that whole subsystem.
- ip26 5y agoThe convergence of RISC & CISC has shown that both things are true. A really simple ISA with a modern design can be pretty darn fast. At the same time, additional ISA complexity helps you wring the utmost out of your hardware, and IMO also helps in the bazaar environment - macro ops let a menagerie of hardware do work in the way most efficient for itself without hardware-specific binaries. Underneath the covers, however, the underlying hardware complexity is an inherent property of modern performance. For example, branch prediction.