> I'm not quite certain what's the use case for most soft CPU's on FPGA-s. They are used for state machines and control algorithms that are complex enough that

> I'm not quite certain what's the use case for most soft CPU's on FPGA-s. They are used for state machines and control algorithms that are complex enough that you don't want to implement them in HDL. High-speed interface (eg, DDR4, high-speed ADC) initialization and training is a common example.