In general yes. ASIC designs are prototyped using FPGAs. You often can't run at full clock speed. But can do orders more test cycles than in a simulator. But F

In general yes. ASIC designs are prototyped using FPGAs. You often can't run at full clock speed. But can do orders more test cycles than in a simulator. But FPGAs are also used as final target technology. When volume is too low, time to market too tight, where flexibility is important, FPGAs are used. Building an ASIC takes 12-15-24 months (depending on design complexity, target process), and a respin (due to an error) of parts of the design adds months before the product can be released. Base stations for 3G/LTE/5G is a good example. They used to be built with a combination of ASICs and DSPs. But this took too long to develop, and was to rigid to handle upgrades (soft upgrade from 3G to LTE was/is a great selling point). Using FPGAs reduced development time, and provided generational upgrade in a much better way. Don't replace boards, just SW and FPGA bitstreams.