3 ms·

MRAM technologies: from space applications to unified cache memory?

36 points by baybal2 5y ago

pabs3 5y ago
@dang: seems to be copied from https://www.eeweb.com/mram-technologies-from-space-applications-to-unified-cache-memory/ https://www.eeweb.com/mram-technologies-from-space-applicati...
- xyzzy21 5y ago
  It doesn't actually matter that much. Most likely it came from the same source, because journalism really doesn't exist anymore and 99% of what is labeled as news is actually the product of corporate PR and marketing teams who are trying to sell a product directly related to the The reason I know about this is because back at HP we helped to pioneer the process/technique. We found that editors and writers could not possibly develop relevant stories given the amount of research required and their publishing deadlines with their budgets. We realized we could "prime/frame" the stories they published by providing 100% publish-ready stories/articles to them. The person who came up with this idea had worked in the publishing industry for 20 years so she knew reality on-the-ground. So we identified both applications and product technologies for everything we sold and then created a minimum of 3 "articles" for each combination. Then when we inevitably got a call from a publisher like EEweb asking for comment/pointers/info about a given market or product, we'd whip out one of the articles and give it to them. 99% of the time, they publish what we gave them without significant/any edits. That was a little creepy but hey it's THEIR due diligence, not ours. This was started in the late 1990s. Since then ALL NEWS pretty much works this way now which the addition of "Think Tanks", NGOs and "Action Committees" writing the articles instead. There is NO SUCH THING as "corporate MSM journalism" anymore. It died starting in the 1990s and now 20+ years later it's 100% dead. Only nontraditional VLOGS, BLOGS and such actually do anything that can be legitimately called objective journalism. BTW I worked on MRAM in the 1980s for the military (I worked on "domain wall technologies" based on bubble memory back then but nothing ever 100% new - applying it to MRAM is an obvious thing) and worked with MRAM vendors in the 2000s, so the history and the content is quite accurate - you can NOT fake the laws of physics, thankfully. But non-technology stuff absolutely can be faked.
PennRobotics 5y ago
For anyone interested in using MRAM rather than reading about it---with the caveat that there's nothing noticeably different from flash as a regular (not performance-focused) developer---I will suggest the first chip I encountered with this memory type: The Ambiq Apollo 4 (Cortex-M4F) includes 2 MB of MRAM and achieves quite a bit of power savings (4 uA/MHz) from the Apollo 3. No idea what proportion of savings comes from new NVM tech vs smaller transistors, better peripherals, or finer voltage thresholding ("SPOT"), and I never checked the claims that MRAM has infinite endurance (as opposed to FRAM) or that computations can be performed from MRAM in the nanowatt regime. https://ambiq.com/apollo4/ https://ambiq.com/apollo4/
- baybal2 5y ago
  MRAM doesn't have an unlimited endurance. At most, the STT MRAM will give you 10^15 guaranteed writes before the junction starts to fail repeatedly. This is though, way, way better than flash. To get to DRAM level it needs 10^17, or ideally 10^18, so it can be used as cache. It is also not the most power efficient memory, but still way better than any DRAM. SOT MRAT promises more performance, and endurance, and VCMA promises more power efficiency, and logic compatibility.
techdragon 5y ago
Speaking as someone who wants to use these in space, on a budget, I enthusiastically support the adoption of MRAM by any new field of tech experiencing a boom of funding like machine learning currently has, it can only bode well for fundamental hardware like MRAM modules to be in higher demand as it will lead to increased production and lower costs, with hopefully improved capabilities but I’d be happy with just lower costs.
watersb 5y ago
""" ...challenges and promises of the various MRAM family members (including spin-transfer torque (STT), spin-orbit torque (SOT), voltage-controlled (VCMA- and VG-SOT) and domain-wall MRAM). They highlight imec’s major role, i.e., developing a CMOS-compatible 300mm platform for bringing these MRAM technologies to the next level.
elevation 5y ago
MRAM can be a better choice for peripheral storage than flash in the embedded space. Say your embedded design will have a 10 year service life, won't have a network connection, and is required to keep an elapsed time indicator of the powered-on time of some expensive peripheral with a 1 second resolution. With a flash-based EEPROM, you may have 100K writes before cells start failing from write fatigue. If you update some cells once per second, you'll hit that threshold in about a day. If you relax your requirement to writing once every hour, your flash will last for 10 years, but you're susceptible to inaccuracies if the device loses power before a write can be recorded. You could also integrate a wear leveling scheme at the cost of additional development and test time. Instead of working around flash's deficiencies, you could replace that EEPROM with MRAM. MRAM lacks enough of a write wear out mechanism for the write interval to matter, so you can safely update a value several times a second for decades without destroying it. This can be done easily from the kind of uC that lacks the memory to support a filesystem or network stack.

36 points by baybal2 5y ago

@dang: seems to be copied from https://www.eeweb.com/mram-technologies-from-space-applications-to-unified-cache-memory/ https://www.eeweb.com/mram-technologies-from-space-applicati...

xyzzy21 5y ago
It doesn't actually matter that much. Most likely it came from the same source, because journalism really doesn't exist anymore and 99% of what is labeled as news is actually the product of corporate PR and marketing teams who are trying to sell a product directly related to the The reason I know about this is because back at HP we helped to pioneer the process/technique. We found that editors and writers could not possibly develop relevant stories given the amount of research required and their publishing deadlines with their budgets. We realized we could "prime/frame" the stories they published by providing 100% publish-ready stories/articles to them. The person who came up with this idea had worked in the publishing industry for 20 years so she knew reality on-the-ground. So we identified both applications and product technologies for everything we sold and then created a minimum of 3 "articles" for each combination. Then when we inevitably got a call from a publisher like EEweb asking for comment/pointers/info about a given market or product, we'd whip out one of the articles and give it to them. 99% of the time, they publish what we gave them without significant/any edits. That was a little creepy but hey it's THEIR due diligence, not ours. This was started in the late 1990s. Since then ALL NEWS pretty much works this way now which the addition of "Think Tanks", NGOs and "Action Committees" writing the articles instead. There is NO SUCH THING as "corporate MSM journalism" anymore. It died starting in the 1990s and now 20+ years later it's 100% dead. Only nontraditional VLOGS, BLOGS and such actually do anything that can be legitimately called objective journalism. BTW I worked on MRAM in the 1980s for the military (I worked on "domain wall technologies" based on bubble memory back then but nothing ever 100% new - applying it to MRAM is an obvious thing) and worked with MRAM vendors in the 2000s, so the history and the content is quite accurate - you can NOT fake the laws of physics, thankfully. But non-technology stuff absolutely can be faked.

PennRobotics 5y ago

For anyone interested in using MRAM rather than reading about it---with the caveat that there's nothing noticeably different from flash as a regular (not performance-focused) developer---I will suggest the first chip I encountered with this memory type: The Ambiq Apollo 4 (Cortex-M4F) includes 2 MB of MRAM and achieves quite a bit of power savings (4 uA/MHz) from the Apollo 3. No idea what proportion of savings comes from new NVM tech vs smaller transistors, better peripherals, or finer voltage thresholding ("SPOT"), and I never checked the claims that MRAM has infinite endurance (as opposed to FRAM) or that computations can be performed from MRAM in the nanowatt regime. https://ambiq.com/apollo4/ https://ambiq.com/apollo4/

baybal2 5y ago
MRAM doesn't have an unlimited endurance. At most, the STT MRAM will give you 10^15 guaranteed writes before the junction starts to fail repeatedly. This is though, way, way better than flash. To get to DRAM level it needs 10^17, or ideally 10^18, so it can be used as cache. It is also not the most power efficient memory, but still way better than any DRAM. SOT MRAT promises more performance, and endurance, and VCMA promises more power efficiency, and logic compatibility.

techdragon 5y ago

Speaking as someone who wants to use these in space, on a budget, I enthusiastically support the adoption of MRAM by any new field of tech experiencing a boom of funding like machine learning currently has, it can only bode well for fundamental hardware like MRAM modules to be in higher demand as it will lead to increased production and lower costs, with hopefully improved capabilities but I’d be happy with just lower costs.

watersb 5y ago

""" ...challenges and promises of the various MRAM family members (including spin-transfer torque (STT), spin-orbit torque (SOT), voltage-controlled (VCMA- and VG-SOT) and domain-wall MRAM). They highlight imec’s major role, i.e., developing a CMOS-compatible 300mm platform for bringing these MRAM technologies to the next level.

elevation 5y ago

MRAM can be a better choice for peripheral storage than flash in the embedded space. Say your embedded design will have a 10 year service life, won't have a network connection, and is required to keep an elapsed time indicator of the powered-on time of some expensive peripheral with a 1 second resolution. With a flash-based EEPROM, you may have 100K writes before cells start failing from write fatigue. If you update some cells once per second, you'll hit that threshold in about a day. If you relax your requirement to writing once every hour, your flash will last for 10 years, but you're susceptible to inaccuracies if the device loses power before a write can be recorded. You could also integrate a wear leveling scheme at the cost of additional development and test time. Instead of working around flash's deficiencies, you could replace that EEPROM with MRAM. MRAM lacks enough of a write wear out mechanism for the write interval to matter, so you can safely update a value several times a second for decades without destroying it. This can be done easily from the kind of uC that lacks the memory to support a filesystem or network stack.