If you are building a CMOS 2-input gate then both NAND and NOR use 4 transistors. (2 NMOS and 2 PMOS each) The reason NAND is preferred is that NMOS transistor

If you are building a CMOS 2-input gate then both NAND and NOR use 4 transistors. (2 NMOS and 2 PMOS each) The reason NAND is preferred is that NMOS transistors have roughly half the resistance of a PMOS transistor of the same size. This means that to get a gate with pull-up and pull-down networks of equal strength (which is usually desirable), the NOR gate needs very large PMOS transistors and tiny NMOS while the NAND gate has all of its' transistors equally sized and relatively small. The result is that NAND gates are smaller in size and slightly quicker than an equivalent NOR gate.